Thursday, March 27, 2014

How Three-State, Tri-State or 3-StateBuffer working in electronices

INTRODUCTION

                                                        



In electronics three-state, tri-state, or 3-state buffer logic, allows an output port to assume a high impedance state in addition to the 0 and 1 logic levels, effectively removing the output from the circuit.

                                                            OR


A tri state (bus driver) device is a device that can be active low, active high.

                                                            OR 

A tri-state buffer is similar to a buffer, but it adds an additional "enable" input that controls whether the primary input is passed to its output or not. If the "enable" inputs signal is true, the tri-state buffer behaves like a normal buffer. If the "enable" input signal is false, the tri-state buffer passes a high impedance  signal, which effectively disconnects its output from the circuit.

  Tri-state buffers are often connected to a bus which allows multiple signals to travel along the same connection.

This allows multiple circuits to share the same output line or lines (such as a bus which cannot listen to more than one device at a time).

   Three-state outputs are implemented in many registers, bus drivers, and flip-flops in the 7400 and 4000 series as well as in other types, but also internally in many integrated circuits. Other typical uses are internal and external buses in microprocessors, computer memory, and peripherals. Many devices are controlled by an active-low input called Output Enable, which dictates whether the outputs should be held in a high-impedance state or drive their respective loads (to either 0- or 1-level).

 

Uses

 

The whole concept of the third state (Hi-Z) is to effectively remove the device's influence from the rest of the circuit. If more than one device is electrically connected, putting an output into the Hi-Z state is often used to prevent short circuits, or one device driving high (logical 1) against another device driving low (logical 0).
Three-state buffers can also be used to implement efficient multiplexers, especially those with large numbers of inputs.
Three-state buffers are essential to the operation of a shared electronic bus.
Three-state logic can reduce the number of wires needed to drive a set of LEDs (tristate multiplexing or Charlieplexing).



Output enable vs. chip select

 

 

Many memory devices designed to connect to a bus (such as RAM and ROM chips) have both CS (chip select) and OE (output enable) pins, which superficially appear to do the same thing. If CS is not asserted, the outputs are high impedance.
The difference lies in the time needed to output the signal. When chip select is deasserted, the chip does not operate internally, and there will be a significant delay between providing an address and receiving the data. (An advantage of course, is that the chip consumes minimal power in this case.)
When chip select is asserted, the chip internally performs the access, and only the final output drivers are disabled by deasserting output enable. This can be done while the bus is in use for other purposes, and when output enable is finally asserted, the data will appear with minimal delay. A ROM or static RAM chip with an output enable line will typically list two access times: one from chip select asserted and address valid, and a second, shorter time beginning when output enable is asserted.

Use of pull-ups and pull-downs

 

When outputs are tri-stated (in the Hi-Z state) their influence on the rest of the circuit is removed, and the circuit node will be "floating" if no other circuit element determines its state. Circuit designers will often use pull-up or pull-down resistors (usually within the range of 1–100 kΩ) to influence the circuit when the output is tri-stated.
The PCI local bus provides pull-up resistors, but they would require several clock cycles to pull a signal high given the bus's large distributed capacitance. To enable high-speed operation, the protocol requires that every device connecting to the bus drive the important control signals high for at least one clock cycle before going to the Hi-Z state. This way, the pull-up resistors are only responsible for maintaining the bus signals in the face of leakage current.


Alternatives to a three-state bus

The open collector input/output is a popular alternative to three-state logic. For example, the I²C bus protocol (a bi-directional communication bus protocol often used between devices) specifies the use of pull-up resistors on the two communication lines. When devices are inactive, they "release" the communication lines and tri-state their outputs, thus removing their influence on the circuit. When all the devices on the bus have "released" the communication lines, the only influence on the circuit is the pull-up resistors, which pull the lines high. When a device wants to communicate, it comes out of the Hi-Z state and drives the line low. Devices communicating using this protocol either let the line float high, or drive it low – thus preventing any bus contention situation where one device drives a line high and another low.
Early microcontrollers often have some pins that can only act as an input, other pins that can only act as a push–pull output, and a few pins that can only act as an open collector input/output. A typical modern microcontroller has many three-state general-purpose input/output pins that can be programmed to act as any of those kinds of pins.
A three-state bus is typically used between chips on a single printed circuit board (PCB), or sometimes between PCBs plugged into a common backplane.
Usage of three-state logic is not recommended for on-chip connections but rather for inter-chip connections.
Three-state buffers used to enable multiple devices to communicate on a data bus can be functionally replaced by a multiplexer. That will help select output from a range of devices and write one to the bus.


Tri-state buffer: It's a Valve

A buffer's output is defined as z = x. Thus, if the input, x is 0, the output, z is 0. If the input, x is 1, the output, z is 1.
It's a common misconception to think that 0 is nothing, while 1 is something. In both cases, they're something. If you read the discussion in What's a Wire, you'll see that a wire either transmits a 0, a 1, or "Z", which is really what's nothing.
It's useful to think of a wire as a pipe, and 0 as "red kool aid" and 1 as "green kool aid" and "Z" as "no kool aid".
A tri-state buffer is a useful device that allows us to control when current passes through the device, and when it doesn't.
Here's two diagrams of the tri-state buffer.
A tri-state buffer has two inputs: a data input x and a control input c. The control input acts like a valve. When the control input is active, the output is the input. That is, it behaves just like a normal buffer. The "valve" is open.
When the control input is not active, the output is "Z". The "valve" is open, and no electrical current flows through. Thus, even if x is 0 or 1, that value does not flow through.

Here's a truth table describing the behavior of a active-high tri-state buffer.


c x z
0 0 z
0 1 z
1 0 0
1 1 1

Why Tri-State Buffers?

We've had a long discussion about what a tri-state buffer is, but not about what such a device is good for.
Recall (from earlier) that a common way for many devices to communicate with one another is on a bus, and that a bus should only have one device writing to it, although it can have many devices reading from it.
Since many devices always produce output (such as registers) and these devices are hooked to a bus, we need a way to control what gets on the bus, and what doesn't.
A tri state buffer is good for that.
Here's an example:
There are three devices, each of which output 32 bits. These devices have their outputs hooked to a 32 bit bus.
We want to prevent more than one device from writing to the bus. Ordinarily, these devices always generate output, so we're in trouble merely by attaching more than one device's output to the bus.
As long as at most one of the following control bits, c0, c1, c2, is 1, the bus is fine. That is, the bus will not have two devices attempting to write to it at the same time.



No comments:

Post a Comment